Main Specifications
  Processor Architecture:
Based on RISC-V multicore lockstep clusters, integrates 6 high-performance cores with frequencies up to 300MHz (real-time control core) + 150MHz (security core), up to 6K DMIPS

  Memory Configuration:
10MB Code Flash + 2MB SRAM, supports FOTA updates and A/B backup.

  Security Engine:
Built-in HSM EVITA FULL-grade encryption module, supports hardware acceleration for China's SM2/SM3/SM4, AES256, and RSA4096.

  Analog & Interfaces:
9 high-speed ADCs (180 channels), 7 Σ-Δ ADCs, 8 high-bandwidth comparators; 10 CAN-FD, 12 LIN, 1 Gbps Ethernet MAC (with TSN support).

  Functional Safety:
Certified for ISO 26262 ASIL-D and AEC-Q100 Grade 1 automotive standards.

Applications
  High-Security Scenarios:
Power domains (motor control/BMS), chassis domains (electromechanical braking/EMB), ADAS domain control.

  Precision Control:
Supports motor control applications exceeding 30,000 RPM (patented "XunLian Architecture" enables picosecond-level PWM control).

Key Advantages
 Domestication Breakthrough:
First RISC-V-based ASIL-D automotive MCU, mitigating geopolitical supply chain risks.

 Ecosystem Collaboration:
Deep adaptation with IAR, HighTec, Vector, and Puhua Basic Software, enabling full-stack development support.

 Performance Optimization:
Proprietary architecture achieves high real-time responsiveness (sub-microsecond latency), outperforming traditional Arm-based MCUs.