In April 2024, Cadence announced the new Cadence^® Palladium^® Z3 Emulation and Protium™ X3 FPGA Prototyping systems, a revolutionary digital twin platform to tackle escalating system and semiconductor design complexity, and to accelerate the development timeline for the most advanced SoCs. Palladium and Protium systems have long been trusted by market-shaping AI, automotive, hyperscale, networking and mobile chip companies to deliver the highest throughput pre-silicon hardware debug and pre-silicon software validation. Targeted at the industry’s largest multi-billion-gate designs, the new Palladium Z3 and Protium X3 systems set a new standard of excellence, providing customers with more than a 2X increase in capacity and a 1.5X performance increase compared to previous-generation systems, enabling faster design bring-up and shortening overall time to market.
Highlights:
– Cadence’s new dynamic duo offers more than 2X increased capacity and is 1.5X faster than the previous generation, enabling the rapid development of advanced chips for generative AI, mobile, automotive, hyperscale and LLM applications
– Palladium Z3 emulator features a new custom Cadence emulation processor that delivers the fastest, most predictable compile and comprehensive pre-silicon hardware debug
– Protium X3 prototyping offers the fastest bring-up times for pre-silicon software validation of billion-gate designs
– Seamlessly integrated flow with unified compiler and common virtual and physical interfaces offers rapid design migration and testing from emulation to prototyping